Solid-state memcapacitor for neural hardware and tunable analog circuits
2011–2013
Academy of Finland
Budget TRC: 376 373 €
Completed

Memcapacitors are two-terminal devices, in which the capacitance is nonvolatively programmable. The aim was to fabricate memristor-based memcapacitors and develop means to compute with the devices. At the device level, the project work included investigation of various possible implementations of a memcapacitor structure. A memcapacitor structure based on a combination of a metal-insulator-metal (MIM) capacitor and a memristive layer was selected for further investigations and prototyping. Different materials for electrodes (Al, Cu, Ag, Au, Ti, Pt) and dielectric layers (HfOx, TiOx, SiO2, SiN) were reviewed and a selection of them tested through processing. Also, different fabrication techniques for depositing material layers were tested during the project, including atomic layer deposition (ALD), sputtering, thermal oxidation, and plasma-enhanced chemical vapour deposition (PECVD). The fabricated memristor-based memcapacitors turned out to be prone to failure during measurements. The fabricated memcapacitor structure was completed in the end of the project.

At the circuit level, the work included investigation of memcapacitor models. At first, simple circuit equivalents were used for circuit design and static simulations. Later, a more advanced model of a memcapacitor was developed, which included a (dynamic) exponential model of a memristor. Also, broad studies were conducted on neural hardware utilizing memcapacitors. A neuron structure with memcapacitive synapses and activation threshold control was designed and optimized to maximize the neural network programmability. Theoretical studies of memristors and memcapacitors indicated their usefullness in performing logic operations and analog computing. Overall, the project progressed the theory, applications and fabrication of nanoscale memdevices, as well as their integration with CMOS circuits.

This project was carried out as a research consortium with VTT Espoo.

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Mika Laiho

Academy Research Fellow, Adjunct prof. of Parallel Computing & Systems

mika.laiho@utu.fi
+358 (0)50 436 7577